153 lines
4.0 KiB
C++
153 lines
4.0 KiB
C++
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2022 Thomas Basler and others
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*/
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#include "ResetReason.h"
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#if ESP_IDF_VERSION_MAJOR > 3 // IDF 4+
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#if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4
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#include <esp32/rom/rtc.h>
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#elif CONFIG_IDF_TARGET_ESP32S2
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#include "esp32s2/rom/rtc.h"
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#elif CONFIG_IDF_TARGET_ESP32C3
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#include "esp32c3/rom/rtc.h"
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#elif CONFIG_IDF_TARGET_ESP32S3
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#include "esp32s3/rom/rtc.h"
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#else
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#error Target CONFIG_IDF_TARGET is not supported
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#endif
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#else // ESP32 Before IDF 4.0
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#include "rom/rtc.h"
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#endif
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String ResetReason::get_reset_reason_verbose(const uint8_t cpu_id)
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{
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RESET_REASON reason;
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reason = rtc_get_reset_reason(cpu_id);
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String reason_str;
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switch (reason) {
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case 1:
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reason_str = "Vbat power on reset";
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break;
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case 3:
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reason_str = "Software reset digital core";
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break;
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#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32S2)
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case 4:
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reason_str = "Legacy watch dog reset digital core";
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break;
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#endif
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case 5:
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reason_str = "Deep Sleep reset digital core";
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break;
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#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32S2)
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case 6:
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reason_str = "Reset by SLC module, reset digital core";
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break;
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#endif
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case 7:
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reason_str = "Timer Group0 Watch dog reset digital core";
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break;
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case 8:
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reason_str = "Timer Group1 Watch dog reset digital core";
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break;
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case 9:
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reason_str = "RTC Watch dog Reset digital core";
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break;
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case 10:
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reason_str = "Instrusion tested to reset CPU";
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break;
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case 11:
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reason_str = "Time Group reset CPU";
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break;
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case 12:
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reason_str = "Software reset CPU";
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break;
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case 13:
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reason_str = "RTC Watch dog Reset CPU";
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break;
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#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32S2)
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case 14:
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reason_str = "for APP CPU, reset by PRO CPU";
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break;
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#endif
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case 15:
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reason_str = "Reset when the vdd voltage is not stable";
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break;
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case 16:
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reason_str = "RTC Watch dog reset digital core and rtc module";
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break;
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default:
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reason_str = "NO_MEAN";
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}
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return reason_str;
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}
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String ResetReason::get_reset_reason_short(const uint8_t cpu_id)
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{
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RESET_REASON reason;
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reason = rtc_get_reset_reason(cpu_id);
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String reason_str;
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switch (reason) {
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case 1:
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reason_str = "POWERON_RESET";
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break;
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case 3:
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reason_str = "SW_RESET";
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break;
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#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32S2)
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case 4:
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reason_str = "OWDT_RESET";
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break;
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#endif
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case 5:
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reason_str = "DEEPSLEEP_RESET";
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break;
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#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32S2)
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case 6:
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reason_str = "SDIO_RESET";
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break;
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#endif
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case 7:
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reason_str = "TG0WDT_SYS_RESET";
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break;
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case 8:
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reason_str = "TG1WDT_SYS_RESET";
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break;
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case 9:
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reason_str = "RTCWDT_SYS_RESET";
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break;
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case 10:
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reason_str = "INTRUSION_RESET";
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break;
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case 11:
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reason_str = "TGWDT_CPU_RESET";
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break;
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case 12:
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reason_str = "SW_CPU_RESET";
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break;
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case 13:
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reason_str = "RTCWDT_CPU_RESET";
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break;
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#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32S2)
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case 14:
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reason_str = "EXT_CPU_RESET";
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break;
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#endif
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case 15:
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reason_str = "RTCWDT_BROWN_OUT_RESET";
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break;
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case 16:
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reason_str = "RTCWDT_RTC_RESET";
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break;
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default:
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reason_str = "NO_MEAN";
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}
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return reason_str;
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} |