df53f34b51
* backport SPIPortManager from @skippermeister * adapt to support ESP32 and ESP32-S3 and ESP32-C3 * use logic to work with SPI numbering as in the official documentation: start with SPI0 and go up to SPI3 * increase Huawei CAN controller stack size to 2000 * increase startup delay for USB_CDC enabled builds to be able to catch bootlogs over USB
137 lines
3.7 KiB
C
137 lines
3.7 KiB
C
#include "cmt_spi3.h"
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#include <Arduino.h>
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#include <esp_rom_gpio.h> // for esp_rom_gpio_connect_out_signal
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SemaphoreHandle_t paramLock = NULL;
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#define SPI_PARAM_LOCK() \
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do { \
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} while (xSemaphoreTake(paramLock, portMAX_DELAY) != pdPASS)
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#define SPI_PARAM_UNLOCK() xSemaphoreGive(paramLock)
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spi_device_handle_t spi_reg, spi_fifo;
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void cmt_spi3_init(const spi_host_device_t spi_host, const int8_t pin_sdio, const int8_t pin_clk, const int8_t pin_cs, const int8_t pin_fcs, const uint32_t spi_speed)
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{
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paramLock = xSemaphoreCreateMutex();
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spi_bus_config_t buscfg = {
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.mosi_io_num = pin_sdio,
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.miso_io_num = -1, // single wire MOSI/MISO
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.sclk_io_num = pin_clk,
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.quadwp_io_num = -1,
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.quadhd_io_num = -1,
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.max_transfer_sz = 32,
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};
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spi_device_interface_config_t devcfg = {
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.command_bits = 1,
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.address_bits = 7,
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.dummy_bits = 0,
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.mode = 0, // SPI mode 0
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.cs_ena_pretrans = 1,
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.cs_ena_posttrans = 1,
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.clock_speed_hz = spi_speed,
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.spics_io_num = pin_cs,
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.flags = SPI_DEVICE_HALFDUPLEX | SPI_DEVICE_3WIRE,
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.queue_size = 1,
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.pre_cb = NULL,
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.post_cb = NULL,
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};
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ESP_ERROR_CHECK(spi_bus_initialize(spi_host, &buscfg, SPI_DMA_DISABLED));
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ESP_ERROR_CHECK(spi_bus_add_device(spi_host, &devcfg, &spi_reg));
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// FiFo
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spi_device_interface_config_t devcfg2 = {
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.command_bits = 0,
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.address_bits = 0,
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.dummy_bits = 0,
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.mode = 0, // SPI mode 0
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.cs_ena_pretrans = 2,
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.cs_ena_posttrans = (uint8_t)(1 / (spi_speed * 10e6 * 2) + 2), // >2 us
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.clock_speed_hz = spi_speed,
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.spics_io_num = pin_fcs,
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.flags = SPI_DEVICE_HALFDUPLEX | SPI_DEVICE_3WIRE,
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.queue_size = 1,
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.pre_cb = NULL,
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.post_cb = NULL,
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};
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ESP_ERROR_CHECK(spi_bus_add_device(spi_host, &devcfg2, &spi_fifo));
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esp_rom_gpio_connect_out_signal(pin_sdio, spi_periph_signal[spi_host].spid_out, true, false);
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delay(100);
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}
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void cmt_spi3_write(const uint8_t addr, const uint8_t dat)
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{
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uint8_t tx_data;
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tx_data = ~dat;
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spi_transaction_t t = {
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.cmd = 1,
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.addr = ~addr,
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.length = 8,
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.tx_buffer = &tx_data,
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.rx_buffer = NULL
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};
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SPI_PARAM_LOCK();
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ESP_ERROR_CHECK(spi_device_polling_transmit(spi_reg, &t));
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SPI_PARAM_UNLOCK();
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delayMicroseconds(100);
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}
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uint8_t cmt_spi3_read(const uint8_t addr)
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{
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uint8_t rx_data;
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spi_transaction_t t = {
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.cmd = 0,
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.addr = ~addr,
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.length = 8,
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.rxlength = 8,
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.tx_buffer = NULL,
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.rx_buffer = &rx_data
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};
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SPI_PARAM_LOCK();
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ESP_ERROR_CHECK(spi_device_polling_transmit(spi_reg, &t));
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SPI_PARAM_UNLOCK();
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delayMicroseconds(100);
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return rx_data;
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}
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void cmt_spi3_write_fifo(const uint8_t* buf, const uint16_t len)
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{
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uint8_t tx_data;
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spi_transaction_t t = {
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.length = 8,
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.tx_buffer = &tx_data, // reference to write data
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.rx_buffer = NULL
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};
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SPI_PARAM_LOCK();
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for (uint8_t i = 0; i < len; i++) {
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tx_data = ~buf[i]; // negate buffer contents
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ESP_ERROR_CHECK(spi_device_polling_transmit(spi_fifo, &t));
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delayMicroseconds(4); // > 4 us
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}
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SPI_PARAM_UNLOCK();
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}
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void cmt_spi3_read_fifo(uint8_t* buf, const uint16_t len)
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{
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uint8_t rx_data;
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spi_transaction_t t = {
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.length = 8,
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.rxlength = 8,
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.tx_buffer = NULL,
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.rx_buffer = &rx_data
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};
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SPI_PARAM_LOCK();
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for (uint8_t i = 0; i < len; i++) {
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ESP_ERROR_CHECK(spi_device_polling_transmit(spi_fifo, &t));
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delayMicroseconds(4); // > 4 us
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buf[i] = rx_data;
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}
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SPI_PARAM_UNLOCK();
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}
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