Fix compile issue with ESP32-C3 MCU

This commit is contained in:
Thomas Basler 2023-01-18 23:08:01 +01:00
parent 0772fd02aa
commit 6235342cf2

View File

@ -34,15 +34,19 @@ String ResetReasonClass::get_reset_reason_verbose(uint8_t cpu_id)
case 3:
reason_str = F("Software reset digital core");
break;
#ifndef CONFIG_IDF_TARGET_ESP32C3
case 4:
reason_str = F("Legacy watch dog reset digital core");
break;
#endif
case 5:
reason_str = F("Deep Sleep reset digital core");
break;
#ifndef CONFIG_IDF_TARGET_ESP32C3
case 6:
reason_str = F("Reset by SLC module, reset digital core");
break;
#endif
case 7:
reason_str = F("Timer Group0 Watch dog reset digital core");
break;
@ -64,9 +68,11 @@ String ResetReasonClass::get_reset_reason_verbose(uint8_t cpu_id)
case 13:
reason_str = F("RTC Watch dog Reset CPU");
break;
#ifndef CONFIG_IDF_TARGET_ESP32C3
case 14:
reason_str = F("for APP CPU, reseted by PRO CPU");
break;
#endif
case 15:
reason_str = F("Reset when the vdd voltage is not stable");
break;
@ -94,15 +100,19 @@ String ResetReasonClass::get_reset_reason_short(uint8_t cpu_id)
case 3:
reason_str = F("SW_RESET");
break;
#ifndef CONFIG_IDF_TARGET_ESP32C3
case 4:
reason_str = F("OWDT_RESET");
break;
#endif
case 5:
reason_str = F("DEEPSLEEP_RESET");
break;
#ifndef CONFIG_IDF_TARGET_ESP32C3
case 6:
reason_str = F("SDIO_RESET");
break;
#endif
case 7:
reason_str = F("TG0WDT_SYS_RESET");
break;
@ -124,9 +134,11 @@ String ResetReasonClass::get_reset_reason_short(uint8_t cpu_id)
case 13:
reason_str = F("RTCWDT_CPU_RESET");
break;
#ifndef CONFIG_IDF_TARGET_ESP32C3
case 14:
reason_str = F("EXT_CPU_RESET");
break;
#endif
case 15:
reason_str = F("RTCWDT_BROWN_OUT_RESET");
break;